1. Field of the Invention
The present invention relates to pattern forming methods, pattern forming apparatuses, and device manufacturing methods, and more particularly to a pattern forming method and a pattern forming unit for forming a pattern on an object, and a device manufacturing method that uses the pattern forming method and the pattern forming apparatus.
2. Description of the Background Art
In a lithography process for manufacturing microdevices (electronic devices) such as a semiconductor, a liquid crystal display device or the like, an exposure apparatus is used that transfers a pattern formed on a mask or a reticle (hereinafter generally referred to as a “reticle”) onto a substrate on which a resist or the like is coated, e.g. a photosensitive object such as a wafer or a glass plate (hereinafter generally referred to as a “wafer”), via a projection optical system.
Semiconductor devices and the like are made by overlaying multiple layers of patterns on the wafer. Therefore, in the exposure apparatus, an operation (alignment) is required for making an optimal positional relation between a pattern formed on the wafer and the pattern formed on the reticle. As the alignment method, the EGA (Enhanced Global Alignment) method is mainly used. In the EGA method, a plurality of specific shot areas (also called sample shot areas or alignment shot areas) is selected in advance, and positional information of alignment marks (sample marks) arranged in the sample shot areas is sequentially measured. Then, static calculation is performed with a least squares method or the like using the measurement results and the designed arrangement information of the shot area, and the arrangement coordinates of the shot areas on the wafer are obtained. Therefore, in the EGA method, the arrangement coordinates of each shot area can be obtained with high precision and high throughput (for example, refer to Kokai (Japanese Patent Unexamined Application Publication) No. 61-44429).
In the above alignment, in order to measure the alignment marks arranged in the plurality of sample shot areas, the wafer has to be moved along a path in which the plurality of alignment marks can be sequentially positioned in a detection area of a mark detection system (an alignment detection system). Conventionally, wafer alignment operation (the measurement operation of sample marks) was performed prior to the beginning of exposure of the wafer, therefore, when the number of sample shots increases more time has to be put into the measurement, which meant that the throughput of the exposure apparatus could decrease.
Therefore, recently, a stage unit by the so-called twin stage method has been developed in which the throughput of the entire apparatus is improved by executing a parallel processing where two wafer stages are prepared and while exposure is performed on one wafer stage, alignment is performed on the other wafer stage, and is employed in the exposure apparatus. However, because the twin stage is costly, requirements are pressing for a technology that can suppress the decrease in throughput caused by the alignment operation without using the twin stage.